FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 1 april 2012 4 3 2 1 5 6 7 8 power 56 d d d d s s s g d d d d g s s s pin 1 bottom top FDMS8558S n-channel powertrench ? syncfet tm 25 v, 90 a, 1.5 m features ? max r ds(on) = 1.5 m at v gs = 10 v, i d = 33 a ? max r ds(on) = 1.7 m at v gs = 4.5 v, i d = 31 a ? high performance technology for extremely low r ds(on) ? syncfet tm schottky body diode ? rohs compliant general description this n-channel syncfet tm is produced using fairchild semiconductor?s advanced powertrench ? process. advancements in both silic on and package technologies have been combined to offer the lowest r ds(on) while maintaining excellent switching performance by extremely low junction-to- ambient thermal resistance. this device has the added benefit of an efficient monolithic schottky body diode. applications ? synchronous rectifier for dc/dc converters ? telecom secondary side rectification ? high end server/workstation vcore low side mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 25 v v gs gate to source voltage 12 v i d drain current -continuous (package limited) t c = 25 c 90 a -continuous t a = 25 c (note 1a) 33 -pulsed 140 e as single pulse avalanche energy (note 3) 145 mj p d power dissipation t c = 25 c 78 w power dissipation t a = 25 c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case t c = 25 c 1.6 c/w r ja thermal resistance, junction to ambient t a = 25 c (note 1a) 50 device marking device package reel size tape width quantity 09od FDMS8558S power 56 13?? 12 mm 3000 units
FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 2 electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 1 ma, v gs = 0 v 25 v bv dss t j breakdown voltage temperature coefficient i d = 10 ma, referenced to 25 c 24 mv/c i dss zero gate voltage drain current v ds = 20 v, v gs = 0 v 500 a i gss gate to source leakage current v gs = +12 v/-8 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 1 ma 1.1 1.4 2.2 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 10 ma, referenced to 25 c -3 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 33 a 1.1 1.5 m v gs = 4.5 v, i d = 31 a 1.3 1.7 v gs = 10 v, i d = 33 a, t j = 125 c 1.6 2.1 g fs forward transconductance v ds = 5 v, i d = 33 a 317 s c iss input capacitance v ds = 13 v, v gs = 0 v, f = 1 mhz 5118 pf c oss output capacitance 1508 pf c rss reverse transfer capacitance 195 pf r g gate resistance 0.9 t d(on) turn-on delay time v dd = 13 v, i d = 33 a, v gs = 10 v, r gen = 6 14 ns t r rise time 8ns t d(off) turn-off delay time 51 ns t f fall time 7ns q g total gate charge v gs = 0 v to 10 v v dd = 13 v, i d = 33 a 81 nc q g total gate charge v gs = 0 v to 4.5 v 38 nc q gs gate to source gate charge 10 nc q gd gate to drain ?miller? charge 9.7 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 2 a (note 2) 0.6 0.8 v v gs = 0 v, i s = 33 a (note 2) 0.8 1.2 t rr reverse recovery time i f = 33 a, di/dt = 300 a/ s 35 ns q rr reverse recovery charge 49 nc notes: 1. r ja is determined with the device mounted on a fr-4 board using a specified pad of 2 oz copper as shown below. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. e as of 145 mj is based on starting t j = 25 c, l = 0.9 mh, i as = 18 a, v dd = 23 v, v gs = 10 v. 100% test at l = 0.1 mh, i as = 39 a. a) 50 c/w when mounted on a 1 in 2 pad of 2 oz copper 125 c/w when mounted on a minimum pad of 2 oz copper. b) g df ds sf ss g df ds sf ss
FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 3 typical characteristics t j = 25 c unless otherwise noted figure 1. 0 0.2 0.4 0.6 0.8 0 20 40 60 80 100 120 140 v gs = 3.5 v v gs = 3 v v ds , drain to source voltage (v) i d , drain current (a) v gs = 4.5 v v gs = 2.5 v v gs = 10v pulse duration = 80 p s duty cycle = 0.5% max on region characteristics f i g u r e 2 . 0 20406080100120140 0 1 2 3 4 5 6 v gs = 2.5 v v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4.5 v v gs = 3 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 i d = 38 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 2345678910 0 1 2 3 4 5 6 t j = 125 o c i d = 38 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1.21.51.82.12.42.7 0 20 40 60 80 100 120 140 t j = 125 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 0.01 0.1 1 10 100 200 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 4 figure 7. 0 153045607590 0 2 4 6 8 10 i d = 38 a v dd = 15 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 13 v gate charge characteristics figure 8. 0.1 1 10 30 100 1000 10000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.001 0.01 0.1 1 10 100 1000 1 10 100 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. maximum continuous drain cur rent vs ambient temperature 25 50 75 100 125 150 0 50 100 150 200 limited by package v gs = 4.5 v r t jc = 1.6 o c/w v gs = 10 v i d , drain current (a) t c , c ase temperature ( o c ) fi g ure 1 1. fo rw ard b ias sa fe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 500 100 us 1 ms 1 s 10 ms dc 10 s 100 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c figure 12. 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 0.1 1 10 100 1000 10000 single pulse r t ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (s) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25 c unless otherwise noted
FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 5 figure 13. junction-to-ambient transient thermal response curve 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 1e-4 1e-3 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (s) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 6 syncfet tm schottky body diode characteristics fairchild?s syncfet tm process embeds a schottky diode in parallel with powertrench mosfet . this diode exhibits similar characteristics to a discrete exte rnal schottky diode in parallel with a mosfet. figure 14 shows the reverse recovery characteristic of the FDMS8558S. schottky barrier diodes exhibit significant leakage at high tem- perature and high reverse voltage. this will increase the power in the device. 700 800 900 1000 1100 -5 0 5 10 15 20 25 30 35 40 di/dt = 300 a/ s current (a) time (ns) 0 5 10 15 20 25 10 -6 10 -5 10 -4 10 -3 10 -2 t j = 125 o c t j = 100 o c t j = 25 o c i dss , reverse leakage current (a) v ds , reverse voltage (v) typical char acteristics (continued) figure 14. FDMS8558S syncfet tm body diode reverse recovery characteristic figure 15. syncfet tm body diode reverse leakage versus drain-source voltage
FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 7 dimensional outlin e and pad layout c l l c pkg pkg 5.10 4.90 6.25 5.90 c 1.27 3.81 3.86 3.61 0.71 0.44 chamf er corner as pin #1 ident may appear as optional top view side view bottom view 1.27 3.81 1.27 6.61 3.91 4.52 1.27 1234 85 6 7 1 4 8 5 land pattern recommendation 12 34 876 0.10 c a b 0.46 0.36 (8x) 4.29 4.09 5 0.71 0.44 0.77 a b (0.39) 0.61 notes: unless otherwise specified a) package standard reference: jedec mo-240, issue a, var. aa, dated october 2002. b) all dimensions are in millimeters. c) dimensions do not include burrs or mold flash. mold flash or burrs does not exceed 0.10mm. d) dimensioning and tolerancing per asme y14.5m-1994. e) it is recommended to have no traces or vias within the keep out area. f) drawing file name: pqfn08arev6. see detail a detail a scale: 2:1 0.05 0.00 0.30 0.20 0.08 c 6.25 5.90 5.85 5.65 5.10 4.90 6 optional draft angle may appear on four sides of the package pin #1 ident may appear as optional seating plane 0.10 c 1.10 0.90 option - a (sawn type) option - b (punched type) keep out area (1.19) (1.81) (0.50) (3.40) (0.52) 0.15 max (2x) 5.10 3.75
FDMS8558S n-channel powertrench ? syncfet tm ?2012 fairchild semiconductor corporation FDMS8558S rev.d1 www.fairchildsemi.com 8 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or design. fairch ild does not assume any liability arising out of the application or use of any product or circuit described herein; neit her does it convey any license under its pat ent rights, nor the rights of others. these specifications do not expand the term s of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life su pport device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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